# C:\Xilinx92i\vhdl\src\simprims\simprim_VITAL_mti.vhd(8241): VITAL timing generic missing port reference(s). ** Warning: C:\Xilinx92i\vhdl\src\simprims\simprim_VITAL_mti.vhd(8220): # C:\Xilinx92i\vhdl\src\simprims\simprim_VITAL_mti.vhd(8220): Compiling architecture x_fdd_v of x_fdd I had a lot of warnings (hundreds) only for simprim library. Of course, I had to compile simulation libraries and I've done it in Xilinx Then if I do it again, for another 1400 ns, I (end on 2800ns), input signals repeat just as it starts from the beginning,īut now I get 'good' results. Which I described happen on first 1400ns. Undefined value most of the time, I mean 'XXXXX' signals.īut there is another cute stuff. Tools are installed with newest versions available & I've chose productsįor post-place&route simulation on Xilinx ISE Simulator I get expected
Is it 'enough' to 'trust' Xilinx ISE Simulator? I'm asking myself which tool should I use? Simulation on ModelSim I get expected results. I have a synchronous design for Xilinx Spartan-3E FPGA and I'm comparing
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